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logic controlled, high-side power switch ADP194 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2011 analog devices, inc. all rights reserved. features low rds on of 80 m at 1.8 v low input voltage range: 1.1 v to 3.6 v 500 ma continuous operating current built-in level shift for control logic that can be operated by 1.2 v logic low 2 a (maximum) ground current ultralow shutdown current <0.7 a reverse current blocking ultrasmall 0.8 mm 0.8 mm 0.5mm, 4-ball, 0.4 mm pitch wlcsp applications mobile phones digital cameras and audio devices portable and battery-powered equipment typical applications circuit gnd en + ? load vin vout ADP194 level shift and slew rate control off on 08629-001 reverse polarity protection figure 1. general description the ADP194 is a high-side load switch designed for operation from 1.1 v to 3.6 v and is protected against reverse current flow from output to input. this load switch provides power domain isolation for extended power battery life. the device contains a low on-resistance p-channel mosfet that supports more than 500 ma of continuous load current and minimizes power loss. the low 2 a (maximum) ground current and ultralow shut- down current make the ADP194 ideal for battery-operated portable equipment. the built-in level shifter in the enable logic input makes the ADP194 compatible with modern processors and gpio controllers. beyond operating performance, the ADP194 occupies minimal printed circuit board (pcb) space with an area of less than 0.64 mm 2 and a height of 0.50 mm. the ADP194 is available in an ultrasmall 0.8 mm 0.8 mm, 4-ball, 0.4 mm pitch wlcsp. www..net
ADP194 rev. 0 | page 2 of 12 table of contents features .............................................................................................. 1 applications....................................................................................... 1 typical applications circuit............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 timing diagram ........................................................................... 3 absolute maximum ratings............................................................ 4 thermal data ................................................................................ 4 thermal resistance ...................................................................... 4 esd caution.................................................................................. 4 pin configuration and function descriptions..............................5 typical performance characteristics ..............................................6 theory of operation .........................................................................8 applications information .................................................................9 ground current.............................................................................9 enable feature ...............................................................................9 timing ......................................................................................... 10 thermal considerations............................................................ 11 pcb layout considerations...................................................... 11 outline dimensions ....................................................................... 12 ordering guide .......................................................................... 12 revision history 5/11revision 0: initial version
ADP194 rev. 0 | page 3 of 12 specifications v in = 1.8 v, v en = v in , i load = 200 ma, t a = 25c, unless otherwise noted. table 1. parameter symbol test conditions min typ max unit input voltage range v in t j = ?40c to +85c 1.1 3.6 v en input en input threshold v en_th 1.1 v v in 1.3 v, t j = ?40c to +85c 0.3 1.0 v 1.3 v < v in < 1.8 v, t j = ?40c to +85c 0.35 1.2 v 1.8 v v in 3.6 v, t j = ?40c to +85c 0.45 1.2 v logic high voltage v ih 1.1 v v in 3.6 v 1.2 v logic low voltage v il 1.1 v v in 3.6 v 0.3 v en input pull-down resistance r en 4 m current ground current 1 i gnd vout open, t j = ?40c to +85c 2 a shutdown current i off en = gnd 0.7 a en = gnd, t j = ?40c to +85c 2 a reverse blocking v out current v en = 0 v, v in = 0 v, v out = 3.6 v 4 a hysteresis |v in ? v out | 50 mv vin to vout resistance rds on v in = 3.6 v, en = 1.5 v 55 m v in = 2.5 v, en = 1.5 v 65 m v in = 1.8 v, en = 1.5 v, t j = ?40c to +85c 80 120 m v in = 1.5 v, en = 1.5 v 105 m v in = 1.2 v, en = 1 v 160 m vout time turn-on delay time t on_dly en = 1.5 v, c load = 1 f 7 s v in = 3.6 v, en = 1.5 v, c load = 1 f 1.5 s 1 ground current includes en pull-down current. timing diagram v en v out turn-on rise 90% 10% turn-off delay turn-off fall turn-on delay 08629-003 figure 2. timing diagram
ADP194 rev. 0 | page 4 of 12 absolute maximum ratings table 2. parameter rating vin to gnd ?0.3 v to +4.0 v vout to gnd ?0.3 v to v in en to gnd ?0.3 v to +4.0 v continuous drain current t a = 25c 1 a t a = 85c 500 ma continuous diode current ?50 ma storage temperature range ?65c to +150c operating junction temperature range ?40c to +125c operating ambient temperature range ?40c to +85c soldering conditions jedec j-std-020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal data absolute maximum ratings apply individually only, not in combination. the ADP194 may be damaged if the junction temperature limits are exceeded. monitoring ambient temperature does not guarantee that t j is within the specified temperature limits. in applications with high power dissipation and poor pcb thermal resistance, the maximum ambient temperature may need to be derated. in applications with moderate power dissipation and low pcb thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. the junction temperature (t j ) of the device is dependent on the ambient temperature (t a ), the power dissipation of the device (p d ), and the junction-to-ambient thermal resistance of the package ( ja ). maximum junction temperature (t j ) is calculated from the ambient temperature (t a ) and power dissipation (p d ) using the formula t j = t a + ( p d ja ) junction-to-ambient thermal resistance ( ja ) of the package is based on modeling and calculation using a 4-layer board. the junction-to-ambient thermal resistance is highly dependent on the application and board layout. in applications where high maximum power dissipation exists, close attention to thermal board design is required. the value of ja may vary, depending on pcb material, layout, and environmental conditions. the speci- fied values of ja are based on a 4-layer, 4 inch 3 inch pcb. see jesd51-7 and jesd51-9 for detailed information regarding board construction. for additional information, see the an-617 application note, microcsp tm wafer level chip scale package . jb is the junction-to-board thermal characterization parameter with units of c/w. jb of the package is based on modeling and calculation using a 4-layer board. the jesd51-12 document, guidelines for reporting and using electronic package thermal information , states that thermal characterization parameters are not the same as thermal resistances. jb measures the component power flowing through multiple thermal paths rather than through a single path, as in thermal resistance ( jb ). therefore, jb thermal paths include convection from the top of the package as well as radiation from the package, factors that make jb more useful in real-world applications. maximum junction temperature (t j ) is calculated from the board temperature (t b ) and the power dissipation (p d ) using the formula t j = t b + ( p d jb ) see jesd51-8, jesd51-9, and jesd51-12 for more detailed information about jb . thermal resistance ja and jb are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja jb unit 4-ball, 0.4 mm pitch wlcsp 260 58.4 c/w esd caution
ADP194 rev. 0 | page 5 of 12 pin configuration and fu nction descriptions vin vout 12 en a b gnd top view (not to scale) 08629-002 figure 3. pin configuration table 4. pin function descriptions pin no. mnemonic description a1 vin input voltage. b1 en enable input. drive en high to turn on the switch; drive en low to turn off the switch. a2 vout output voltage. b2 gnd ground.
ADP194 rev. 0 | page 6 of 12 typical performance characteristics v in = 1.8 v, v en = v in > v ih , i load = 100 ma, t a = 25c, unless otherwise noted. 0 0.02 0.04 0.06 0.08 0.10 0.12 ?40 ?5 65 25 85 rds on ( ? ) temperature (c) 08629-004 i load = 20ma i load = 50ma i load = 100ma i load = 200ma i load = 500ma figure 4. rds on vs. temperature 0 0.05 0.10 0.15 0.20 0.25 0.30 1.0 1.4 1.8 2.2 2.6 3.0 3.4 rds on ( ? ) v in (v) 08629-005 i load = 10ma i load = 20ma i load = 50ma i load = 100ma i load = 200ma i load = 500ma figure 5. rds on vs. input voltage, v in 0 20 40 60 80 100 120 140 10 100 1000 difference (v) i load (ma) v in = 1.1v v in = 1.3v v in = 1.5v v in = 1.8v v in = 2.1v v in = 2.4v v in = 2.7v v in = 3.0v v in = 3.3v v in = 3.6v 08629-006 figure 6. voltage drop vs. load current 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2040608010 time (s) vol 0 t age (v) v en v in = 1.5v v in = 1.8v v in = 2.5v v in = 3.6v 08629-007 figure 7. start-up and turn-on delay vs. input voltage 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 ground current (a) ?40 ?5 65 25 85 temperature (c) i load = 20ma i load = 50ma i load = 100ma i load = 200ma i load = 500ma 08629-008 figure 8. ground current vs. temperature 0 1 2 3 4 5 6 7 1.0 1.4 1.8 2.2 2.6 3.0 3.4 ground current (a) v in (v) i load = 10ma i load = 20ma i load = 50ma i load = 100ma i load = 200ma i load = 500ma 08629-009 figure 9. ground current vs. input voltage, v in
ADP194 rev. 0 | page 7 of 12 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 ?40 ?20 0 20 40 60 80 100 i gnd shutdown current (a) temperature (c) 08629-010 v in = 1.1v v in = 1.5v v in = 1.8v v in = 2.4v v in = 2.7v v in = 3.3v v in = 3.6v figure 10. shutdown current vs. temperature, v out open 0.01 0.1 1 10 ?40 ?20 0 20 40 60 80 100 i gnd shutdown current (a) temperature (c) v in = 1.1v v in = 1.5v v in = 1.8v v in = 2.4v v in = 2.7v v in = 3.3v v in = 3.6v 08629-011 figure 11. shutdown current vs. temperature, v out = 0 v 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 ?40 ?20 0 20 40 60 80 100 i out shutdown current (a) temperature (c) 08629-012 v in = 1.1v v in = 1.5v v in = 1.8v v in = 2.4v v in = 2.7v v in = 3.3v v in = 3.6v figure 12. i out shutdown current vs. temperature, v out = 0 v 0.1 1 10 v in = 1.1v v in = 1.5v v in = 1.8v v in = 2.4v v in = 2.7v v in = 3.3v v in = 3.6v ?40 ?20 0 20 40 60 80 100 i gnd shutdown current (a) temperature (c) 08629-013 figure 13. reverse shutdown current vs. temperature, v out = 0 v 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 ?40 ?20 0 20 40 60 80 100 i out shutdown current (a) temperature (c) 08629-114 v in = 1.1v v in = 1.5v v in = 1.8v v in = 2.4v v in = 2.7v v in = 3.3v v in = 3.6v figure 14. i out reverse current vs. temperature, v out = 0 v
ADP194 rev. 0 | page 8 of 12 theory of operation the ADP194 is a high-side pmos load switch. it is designed to operate from a supply range from 1.1 v to 3.6 v. the pmos load switch is designed for low on resistance, 80 m at v in = 1.8 v, and supports 500 ma of continuous output current. the ADP194 is a low ground current device with a nominal 4 m pull-down resistor on its enable pin. the reverse current protection circuitry prevents current flow backwards through the ADP194 when the output voltage is greater than the input voltage. a comparator senses the differ- ence between the input and output voltages. when the difference between the input voltage and output voltage exceeds 50 mv, the body of the pfet is switched to v out and turned off or opened. in other words, the gate is connected to vout. the package is a space-saving 0.8 mm 0.8 mm, 4-ball wlcsp. 08629-115 gnd en vin vout ADP194 level shift and slew rate control reverse polarity protection figure 15. functional block diagram
ADP194 rev. 0 | page 9 of 12 applications information ground current the major source for ground current in the ADP194 is the 4 m pull-down resistor on the enable (en) pin. figure 16 shows typical ground current when v en = v in and v in varies from 1.1 v to 3.6 v. 0 1 2 3 4 5 6 7 10 100 1000 ground current (a) i load (ma) v in = 1.1v v in = 1.5v v in = 1.8v v in = 2.1v v in = 2.4v v in = 2.7v v in = 3.0v v in = 3.3v v in = 3.6v v in = 1.3v 08629-116 figure 16. ground current vs. load current, different input voltages as shown in figure 17 , an increase in ground current can occur when v en v in . this is caused by the cmos logic nature of the level shift circuitry as it translates an en signal 1.1 v to a logic high. this increase is a function of the v in ? v en delta. 14 12 10 8 6 4 2 0 3.5 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 3.3 3.1 2.9 v en (v) ground current (a) v out = 1.8v v out = 3.6v 08629-014 figure 17. typical ground current when v en v in enable feature the ADP194 uses the en pin to enable and disable the vout pin under normal operating conditions. as shown in figure 18 , when a rising voltage on en crosses the active threshold, vout turns on. when a falling voltage on en crosses the inactive threshold, vout turns off. 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1.2 0 0.4 0.5 0.6 0.7 0.1 0.2 0.3 0.8 0.9 1.0 1.1 v en (v) v out (v) 08629-015 figure 18. typical en operation, v in = 1.8 v the en input has built-in hysteresis, as shown in figure 18 . the hysteresis prevents on/off oscillations that can occur due to noise on the en pin as v en passes through the threshold points. the en input active/inactive thresholds derive from the v in voltage; therefore, these thresholds vary with changing input voltage. figure 19 shows typical en active/inactive thresholds when the input voltage varies from 1.1 v to 3.6 v. 1.15 1.05 0.95 0.85 0.75 0.65 0.55 0.45 0.35 3.60 1.20 1.35 1.50 1.65 1.80 1.95 2.10 2.25 2.40 2.55 2.70 2.85 3.00 3.15 3.30 3.45 v in (v) typical en thresholds (v) en active en inactive 0 8629-016 figure 19. typical en pin thresholds vs. input voltage, v in
ADP194 rev. 0 | page 10 of 12 timing turn-on delay is defined as the delta between the time that en reaches >1.1 v until vout rises to ~10% of its final value. the ADP194 includes circuitry to set the typical 1.5 s turn-on delay at 3.6 v v in to limit the v in inrush current. as shown in figure 20 , the turn-on delay is dependent on the input voltage. 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2040608010 time (s) vol 0 t age (v) v en v in = 1.5v v in = 1.8v v in = 2.5v v in = 3.6v 08629-020 figure 20. typical turn-on delay time with varying input voltage the rise time of vout is defined as the time delta between the 10% and 90% points of vout as it transitions to its final value. it is dependent on the rc time constant where c = load capacit- ance (c load ) and r = rds on ||r load . because rds on is usually smaller than r load , an adequate approximation for rc is rds on c load . the ADP194 does not need any input or load capacitor, but capacitors can be used to suppress noise on the board. if significant load capacitance is connected, inrush current may be a concern. 089629-021 ch1 500mv b w ch3 1.00v b w a ch3 400mv 2 1 3 ch2 200ma ? b w m20.0s t 10.00% v en v out load current figure 21. typical rise time and inrush current with v in = 1.8 v, c load = 1 f 089629-022 ch1 1.00v b w ch3 1.00v b w ch2 200ma ? b w m4.00s a ch3 400mv 2 1 3 t 10.00% v out v en load current figure 22. typical rise time and inrush current with v in = 3.6 v, c load = 1 f the fall time or turn-off time of vout is defined as the time delta between the 90% and 10% points of vout as it transi- tions to its final value. the turn-off time is also dependent on the rc time constant. 089629-023 ch1 500mv b w ch3 1.00v b w ch2 200ma ? b w m2.00s a ch3 400mv 2 1 3 t 10.00% v out v en load current figure 23. typical turn-off time, v in = 1.8 v, r load = 3.6 089629-024 ch1 1.00v b w ch3 1.00v b w ch2 200ma ? b w m2.00s a ch3 400mv 2 1 3 t 10.00% v out v en load current figure 24. typical turn-off time, v in = 3.6 v, r load = 7.5
ADP194 rev. 0 | page 11 of 12 thermal considerations power dissipation due to ground current is quite small and can be ignored. therefore, the junction temperature equation simplifies to the following: in most applications, the ADP194 does not dissipate much heat due to its low on-channel resistance. however, in applications with high ambient temperature and high load current, the heat dissipated in the package can cause the junction temperature of the die to exceed the maximum junction temperature of 125c. t j = t a + {[( v in ? v out ) i load ] ja } (3) in cases where the board temperat ure is known, use the thermal characterization parameter, jb , to estimate the junction temper- ature rise. maximum junction temperature (t j ) is calculated from the board temperature (t b ) and power dissipation (p d ) using the formula the junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to the power dissipation, as shown in equation 1. t j = t b + ( p d jb ) (4) to guarantee reliable operation, the junction temperature of the ADP194 must not exceed 125c. to ensure that the junction temperature stays below this maximum value, the user must be aware of the parameters that contribute to junction temperature changes. these parameters include ambient temperature, power dissipation in the device, and thermal resistances between the junction and ambient air ( ja ). the ja value is dependent on the package assembly compounds that are used and the amount of copper used to solder the package gnd pin to the pcb. table 5 shows typical ja values of the 4-ball wlcsp for various pcb copper sizes. tabl e 6 shows the typical jb value of the 4-ball wlcsp. pcb layout considerations the heat dissipation capability of the package can be improved by increasing the amount of copper attached to the pins of the ADP194. however, as listed in table 5 , a point of diminishing returns is eventually reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. it is critical to keep the input and output traces as wide and as short as possible to minimize the circuit board trace resistance. table 5. typical ja values for wlcsp copper size (mm 2 ) ja (c/w) 0 1 260 50 159 100 157 300 153 500 151 1 device soldered to minimum size pin traces. table 6. typical jb values package jb unit 4-ball wlcsp 58.4 c/w 0 8629-025 the junction temperature of the ADP194 is calculated from the following equation: figure 25. ADP194 pcb layout t j = t a + ( p d ja ) (1) where: t a is the ambient temperature. p d is the power dissipation in the die, given by p d = [( v in ? v out ) i load ] + ( v in i gnd ) (2) where: i load is the load current. i gnd is the ground current. v in and v out are the input and output voltages, respectively.
ADP194 rev. 0 | page 12 of 12 outline dimensions 0.800 0.740 sq 0.720 bottom view (ball side up) top view (ball side down) a 12 b ball a1 identifier 0.40 ref 0.560 0.500 0.440 end view 0.300 0.260 0.220 0.330 0.300 0.270 seating plane 0.230 0.200 0.170 coplanarity 0.03 10-08-2010-a figure 26. 4-ball wafer level chip scale package [wlcsp] (cb-4-5) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding ADP194acbz-r7 ?40c to +85c 4-ball wafer level chip scale package [wlcsp] cb-4-5 76 ADP194cb-evalz evaluation board 1 z = rohs compliant part. ?2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d08629-0-5/11(0)

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